This invention relates to a driving circuit for an electro-optical device, a driving method therefor, a DA converter, a signal line driving circuit, an electro-optical panel, a projection display device, and electronic equipment.
Generally, an image display portion of a liquid crystal display device is constituted by a device substrate, an opposing substrate, and a liquid crystal which fills the gap between these substrates. A plurality of scanning lines, a plurality of signal lines, and a plurality of transistors and a plurality of pixel electrodes provided correspondingly to intersections between the scanning lines and the signal lines, are formed on the device substrate. On the other hand, common electrodes are formed on the opposing substrate. Further, the plurality of transistors used therein are thin film transistors (hereunder referred to as TFTs).
Each of the TFTs has a gate, a source, and a drain, which are respectively connected to one of the scanning lines, one of the signal lines, and one of the pixel electrodes.
Usually, a method for driving this image display portion may consist of the steps of simultaneously turning on a plurality of TFTs connected to scanning lines by selecting the scanning lines with a predetermined timing, and then simultaneously applying voltages of signal lines to pixel electrodes. In this case, voltages corresponding to image data are supplied to the signal lines. The transmittance of a liquid crystal is controlled according to a voltage applied to between the pixel electrodes and common electrodes. This enables the display device to perform gray scale display according to values represented by image data.
Meanwhile, the relation between the voltage applied to a liquid crystal and the transmittance of the liquid crystal is not linear but non-linear. Thus, there is the necessity for performing a process of making an amount of a change in the transmittance of the liquid crystal caused corresponding to each gray scale level of the image data, uniform. In the present application, this process is referred to as a xcex3 correction.
FIG. 28 is a block diagram illustrating a signal line driving circuit for driving one of the signal lines, and also illustrating peripheral circuits thereof. In this figure, the signal line driving circuit consists of a first latch circuit 921, a second latch circuit 922, and a DA converter 93. Further, a controller 6 and a xcex3 correction circuit 91 are provided at the preceding stage of this signal line driving circuit.
The controller 6 generates 6-bit image data DA. The xcex3 correction circuit 91 performs a xcex3 correction on the image data DA to thereby produce 8-bit image data DB (Dxcex31, Dxcex32, . . . , Dxcex38). Incidentally, the xcex3 correction circuit 91 is constituted by a RAM or a ROM, in which a table for performing a xcex3 correction is stored. Data stored in this table is determined according to the input/output characteristics of the DA converter 93 and the transmittance-applied-voltage characteristics of the liquid crystal.
The DA converter 93 is a capacitance-divided type DA converter, which has switch and capacitive elements. The DA converter 93 has 8 capacitive devices 941 to 948. Let C denote the capacitive value of the capacitive device 941. The capacitive values of the capacitive devices 942, 943, . . . , 948 are selected as 2C, 4C, . . . , 128C, respectively.
Further, a signal line 99 has a signal line parasitic capacitor or capacitance 940. In FIG. 28, the value of the parasitic capacitance is designated by reference character Cs. The voltage Vcom at the other terminal of the signal line capacitor 940 is applied to a common electrode placed in the opposing substrate.
Two reference voltages Va and Vb are supplied to the DA converter 93. One of terminals of each of the capacitive devices 941 to 948 is connected to a supply terminal Ta through which the reference voltage Va is supplied. On the other hand, the other terminal of each of the capacitive devices 941 to 948 is connected to the supply terminal Ta through a corresponding one of the reset switches 951 to 958. When each of the switches 951 to 958 is turned on, both terminals of each of the capacitive devices 941 to 948 is short-circuited. Thus, charges charged in each of these capacitive devices are discharged. Further, a reset switch 910 is connected to a point between a supply terminal Tb, through which the reference voltage Vb is supplied, and the signal line 99. When this switch 910 is turned on, the electric potential of the signal line 99 is reset to the voltage Vb.
Additionally, switches 961 to 968 adapted to be turned on or off according to the values indicated by the image data Dxcex31 to Dxcex38 are provided between the signal line 99 and each of the capacitive devices 941 to 948. When the switches 961 to 968 are selectively turned on, the capacitive devices connected to the turned-on switches are connected in parallel with one another. Consequently, a voltage corresponding to the image data DB is applied to the signal line 99.
FIG. 29(A) is a graph illustrating the relation between the decimal value of the image data DA and the output voltage Vc of a DA converter 93. FIG. 29(B) is a graph illustrating the relation between the transmittance SLP of a liquid crystal and the voltage VLP to be applied to a pixel electrode through the signal line.
A brief description is given of the operating principle of the driving circuit with reference to FIGS. 29(A) and 29(B). First, when the 6-bit image data DA is inputted from the controller 6 to the xcex3 correction circuit 91, this correction circuit 91 converts the image data DA to the 8-bit image data DB. Incidentally, the aforementioned table is created as follows. First, 64 pieces of the 8-bit data, from which gray scale levels are set according to the transmittance characteristic of the liquid crystal pixel in such a manner as to respectively correspond to equal intervals of a predetermined change in the transmittance of the liquid crystal, are preliminarily selected from 256 pieces of the 8-bit data. Then, the selected 64 pieces of the 8-bit data are stored in the table as the image data DB by being made to correspond to the 6-bit image data DA, respectively.
Thus, when the 6-bit image data DA is inputted to the xcex3 correction circuit 91, this xcex3 correction circuit 91 reads data from the table, which corresponds to the value represented by the inputted image data DA and outputs the read data as the image data DB. That is, the image data DB is represented by using 8 bits so that amounts of a change in the transmittance of the liquid crystal xcex94SLP, which respectively correspond to the differences between the adjoining gray scale levels of the image data DA, are equal to one another.
Meanwhile, the driving circuit illustrated in FIG. 28 performs the xcex3 correction, as described above. Thus, the xcex3 correction circuit 91 becomes necessary. Furthermore, there is a tendency to increase the size of the liquid crystal panel. The length of the signal line 99 increases with increase in the size of the panel. Thus, when the liquid crystal panel increases in size, the value of the parasitic capacitance Cs tends to increase. On the other hand, the DA converter 93 applies a desired voltage to the signal line 99 by transferring charges between the parasitic capacitor 940 and a group of the capacitive devices 941 to 948. Therefore, when the value of the parasitic capacitance Cs increases, it is necessary to increase the capacitive value of each of the capacitive devices 941 to 948. Generally, the capacitive devices take up a large area in the integrated circuit. Consequently, this hinders the miniaturization of the driving circuit.
Further, there has been devised an alternative measure to raise the voltage to be supplied to the capacitive devices 941 to 948 of the DA converter 93, instead of increasing the sizes thereof. However, in the case of employing TFTs as the devices of the driving circuit, there is an upper limit to the power supply voltage to the withstand voltages of such devices, and about 20 V at most.
On the other hand, there is an alternative measure to constitute the driving circuit by using amplifiers without using the DA converter 93, and to impart the xcex3 correction function to the signal line driving circuit. However, the power consumption of the amplifier is extremely high. Therefore, the amplifier is not suitable for use in the driving circuit of the liquid crystal display device that is essentially advantageous in low power consumption. Additionally, if an operational amplifier which may consist of TFTs is formed on a glass substrate, variation in the operating characteristics of the operational amplifier is liable to occur.
The present invention is accomplished in view of the aforementioned problems. Accordingly, an object of the present invention is to provide a driving circuit and method which can reduce the area occupied by the circuit in an electro-optical device, and which can drive the device at low power consumption. Another object of the present invention is to provide a driving circuit and method which can reduce variation in the output characteristics of the driving circuit, and which can enhance the reliability thereof even when the driving circuit is formed in the device substrate. Another object of the present invention is to provide a driving circuit for use in an electro-optical device, which can be driven at a low voltage. Another object of the present invention is to provide an electro-optical panel using such a driving circuit, and to provide electronic equipment having such an electro-optical panel.
It is assumed that a driving method for driving an electro-optical device is applied to an electro-optical device having a plurality of scanning lines, a plurality of signal lines, a plurality of transistors connected to the scanning lines and the signal lines, and a plurality of pixel electrodes connected to the transistors. Further, this driving method may consist of the steps of charging a reset voltage into parasitic capacitance of the signal line, charging a reference voltage into an internal capacitance, and transferring charges between the internal capacitance and the parasitic capacitance. Moreover, the steps of charging a reference voltage into the internal capacitance, and transferring the charges are repeated a number of times, which is determined according to a value indicated by image data.
According to this method of the present invention, first, the reset voltage is charged into a parasitic capacitance of the signal line. Note that a voltage corresponding to a black level or to a white level is quickly charged into the capacitance of the signal line, by preliminarily selecting the voltage corresponding to the black level or to the white level as the reset voltage. Next, the reference voltage is charged into the internal capacitance of the signal line, and subsequently, charges are transferred between the internal capacitance and the parasitic capacitance. Thus, the voltage of the signal line can be adjusted. Incidentally, the number of times of repeating the steps of charging and transferring charges corresponds to a value indicated by the image data.
In the case of this method, it is preferable that the transistors are turned on after the step of charging the reference voltage into the internal capacitance and the step of transferring the charges are repeated a number of times, which corresponds to the value indicated by the image data. In this case, after a voltage corresponding to the value indicated by the image data is charged into the parasitic capacitance of the signal line, this voltage can be applied to the pixel electrode.
Furthermore, it is assumed that another driving method for driving an electro-optical device according to the present invention is applied to an electro-optical device having a plurality of scanning lines, a plurality of signal lines, a plurality of transistors connected to the scanning lines and the signal lines, and a plurality of pixel electrodes connected to the transistors. Further, first, one of a predetermined first reset voltage and a predetermined second reset voltage is selected according to the most significant bit of the image data. Then, the selected voltage is supplied to the signal line (in step a). Next, one of the first reference voltage and the second reference voltage is selected according to the most significant bit of the image data. Then, the selected voltage is supplied to the internal capacitance (in step b). Next, the transfer of charges between the internal capacitance and the parasitic capacitance is performed (in step c). Moreover, the steps b and c are repeated a number of times, which corresponds to a value indicated by low order bits of the image data which are other than the most significant bit of the image data.
In the case that the electro-optical material used in the electro-optical device is, for example, a liquid crystal, the gradient of a transmittance characteristic curve representing a ratio of a transmittance of the liquid crystal to an applied voltage increases with an increase in the applied voltage. Further, in a region in which the applied voltage is high and the transmittance is low, the gradient of the characteristic curve increases with decrease in the applied voltage. Further, a change in the gradient of the transmittance characteristic curve in a region in which the transmittance is high is in inverse relation to a change in the gradient of the transmittance characteristic curve in another region in which the transmittance is lower. Namely, the transmittance characteristic curve is nearly symmetric with respect to a point corresponding to a transmittance of 50%. Thus, it is necessary that the xcex3 correction characteristic is established in such a way as to be symmetric with respect to a central value of the values indicated by the image data. To this end, there is the need for deciding whether or not the value indicated by the image data is larger than the central value, and changing the magnitude relation the reset voltage and the reference voltage into the inverted magnitude relation therebetween according to a result of this decision. According to the present invention, the reset voltage and the reference voltage are selected according to the most significant bit of the image data. Further, the transfer of charges is repeated a number of times which corresponds to the value indicated by the low order bits of the image data. Thus, a DA conversion is performed on the image data by performing the xcex3 correction.
Furthermore, it is assumed that another driving method for driving an electro-optical device according to the present invention is applied to an electro-optical device having a plurality of scanning lines, a plurality of signal lines, a plurality of transistors connected to the scanning lines and the signal lines, and a plurality of pixel electrodes connected to the transistors. Further, first, one of a predetermined first reset voltage and a predetermined second reset voltage is selected according to a plurality of high order bits of the image data. Then, the selected voltage is supplied to the signal line (in step a). Next, one of a predetermined reference voltages is selected according to the plurality of high order bits of the image data. Then, the selected voltage is supplied to the internal capacitance (in step b). Next, the transfer of charges between the internal capacitance and the parasitic capacitance is performed (in step c). Moreover, the steps b and c are repeated a number of times, which corresponds to a value indicated by low order bits of the image data, which are other than the plurality of high order bits of the image data.
According to this method of the present invention, one of the reset voltage and the reference voltage is selected according to the value indicated by the plurality of high order bits of the image data. Thus, the xcex3 correction characteristic curve can be divided into a plurality of ranges of the number that corresponds to the number of the high order bits. Further, the xcex3 correction characteristic can be adjusted in each of the ranges obtained by the division. Therefore, the accuracy of the xcex3 correction characteristic can be improved.
Next, a DA converter of the present invention is used in a driving circuit for driving an electro-optical device having a plurality of scanning lines, a plurality of signal lines, a plurality of transistors connected to the scanning lines and the signal lines, and a plurality of pixel electrodes connected to the transistors. Further, this DA converter has a plurality of DA units respectively connected to signal lines. Moreover, each of the DA units has a first charging portion for charging the reset voltage into the parasitic capacitance of the signal line, a second charging portion provided with an internal capacitance for charging the reference voltage into the internal capacitance and for transferring charges between the internal capacitance and the parasitic capacitance after the reference voltage is charged into the internal capacitance, and a control portion for controlling the first charging portion in such a way so as to charge the reset voltage into the parasitic capacitance, and for then controlling the second charging portion in such a way as to repeat the charging and the transfer of charges a number of times corresponding to a value indicated by predetermined low order bits of the image data.
Generally, the capacitance or capacitor occupies a large area. However, the DA converter incorporates a single internal capacitance. Therefore, according to the present invention, the circuit scale can be reduced. Further, after the first charging portion charges the reset voltage into the parasitic capacitance, the second charging portion repeats the charging and the transfer of charges a number of times corresponding to a value indicated by the predetermined low order bits of the image data. Consequently, the DA conversion can be performed by simultaneously performing the xcex3 correction. Thus, there is no need for providing a xcex3 correction circuit in the preceding stage of the DA converter.
Incidentally, preferably, the control portion has a counter for counting the number of times of the charging and the transfer of charges, a comparator for comparing the count value of the counter with the value indicated by the low order bits of the image data, and a control signal generating circuit for generating a control signal used for controlling the second charging portion to perform the charging and the transfer of charges according to a result of a comparison. According to this control portion of the present invention, the number of times for performing the charging and the transfer of charges can be made to be equal to the value indicated by the predetermined low order bits of the image data.
Further, the aforementioned DA converter has a counter for counting the number of times for charging and transferring of charges and for outputting count data representing a count value. Preferably, the control portion of each of the aforementioned DA units has a comparator for comparing the count data with a value represented by the low order bits, and a control signal generating circuit for generating a control signal used to control the second charging portion in such a manner so as to cause the charging and the transfer of charges according to a result of a comparison. According to this circuit of the present invention, the counter can be used in common among the DA units. Thus, the circuit scale of the DA converter is considerably reduced.
Moreover, the aforementioned DA converter may have a first selection circuit for selecting one of a first reset voltage and a second reset voltage according to the most significant bit of the image data and for supplying the selected voltage to the first charging portion as the reset voltage, and a second selection circuit for selecting one of a first reference voltage and a second reference voltage according to the most significant bit of the image data and for supplying the selected voltage to the second charging portion as the reference voltage. According to this circuit of the present invention, a DA conversion can be performed by simultaneously performing a xcex3 correction.
Furthermore, preferably, in the DA converter having first and second selection circuits, the first charging portion has a first switch connected between the first selection circuit and the signal line. The second charging portion has a second switch connected between the second selection circuit and the internal capacitance, and a third switch connected between the internal capacitance and the signal line. It is preferable that the control portion first turns on the first switch, that then, the control portion turns off the first switch, and that subsequently, the control portion alternately turns on and off the second and third switches a number of times corresponding to a value indicated by the low order bits other than the most significant bit of the image data. According to this circuit of the present invention, the reset voltage is charged into the parasitic capacitance by controlling the on/off of the first switch. Further, the charging of the internal capacitance and the transfer of charges between the internal capacitance and the parasitic capacitance are alternately performed by alternately turning on and off the second and third switches. Thus, the DA converter can perform a DA conversion by simultaneously performing a xcex3 correction on the image data.
Additionally, the aforementioned DA converter may have a first selection circuit for selecting one of a first reset voltage and a second reset voltage according to the most significant bit of the image data and for supplying the selected voltage to the first charging portion as the reset voltage, and a second selection circuit for selecting one of a first reference voltage and a second reference voltage according to the most significant bit of the image data and for supplying the selected voltage to the second charging portion as the reference voltage. According to this circuit of the present invention, a DA conversion can be performed by simultaneously performing a xcex3 correction.
Moreover, preferably, in the DA converter having first and second selection circuits, the first charging portion has a first switch connected between the first selection circuit and the signal line. The second charging portion has a second switch connected between the second selection circuit and one of two terminals of the internal capacitance, a third switch connected between the second selection circuit and the other terminal of the internal capacitance, a fourth switch connected between the signal line and one of two terminals of the internal capacitance, and a fifth switch connected between the signal line and the other terminal of the internal capacitance. It is preferable that the control portion first turns on the first switch, that then, the control portion turns off the first switch, and that subsequently, the control portion alternately turns on and off a pair of the second and fifth switches and a pair of the third and fourth switches a number of times, which corresponds to a value indicated by the low order bits other than the most significant bit of the image data.
According to this circuit of the present invention, the reset voltage is charged into the parasitic capacitance by controlling the on/off of the first switch. Further, two pairs of the switches are alternately turned on and off. Thus, during one of the pairs of the switches is turned on, the other pair of the switches is turned off. Therefore, each time the on-state and the off-state thereof are switched, the charging of the internal capacitance and the transfer of charges between the internal capacitance and the parasitic capacitance are simultaneously performed. Thus, the gradient of an output voltage characteristic curve can be increased. In other words, even when a ratio of the value of the internal capacitance to the value of the parasitic capacitance is reduced, desired output voltage characteristics can be obtained. Hence, a capacitor having a small occupied area can be used as the internal capacitance.
Further, the aforementioned DA converter may have a selection circuit for selecting one of a plurality of sets of a reset voltage and a reference voltage according to a plurality of high order bits of the image data, for outputting the selected reset voltage from a reset voltage output terminal to thereby supply the selected reset voltage to the first charging portion, and for outputting the selected reference voltage output terminal from a reference voltage output terminal to thereby supply the selected reference voltage to the second charging portion. According to this circuit of the present invention, a set of a reset voltage and a reference voltage is selected according to a plurality of high order bits of the image data. Thus, the output voltage characteristic of the DA converter is generated by being divided into a plurality of ranges corresponding to the values of the image data. Therefore, the output voltage characteristic corresponding to each of the ranges is determined the selected set of the reset voltage and the reference voltage. Consequently, the output voltage characteristic of the DA converter can be brought close to an ideal xcex3 correction characteristic by suitably setting the reset voltage and the reference voltage.
Furthermore, preferably, in the DA converter having a selection circuit, the first charging portion has a first switch connected between the reset voltage output terminal and the signal line. The second charging portion has a second switch connected between the reference voltage output terminal and the internal capacitance, and a third switch connected between the internal capacitance and the signal line. It is preferable that the control portion first turns on the first switch, that then, the control portion turns off the first switch, and that subsequently, the control portion alternately turns on and off the second and third switches a number of times, which corresponds to a value indicated by the low order bits other than the plurality of high order bits of the image data. According to this circuit of the present invention, the reset voltage is charged into the parasitic capacitance by controlling the on/off of the first switch. Further, the charging of the internal capacitance and the transfer of charges between the internal capacitance and the parasitic capacitance are alternately performed by alternately turning on and off the second and third switches. Thus, the DA converter can perform a DA conversion by simultaneously performing a xcex3 correction on the image data.
Additionally, preferably, in the DA converter having a selection circuit, the first charging portion has a first switch connected between the reset voltage output terminal and the signal line. The second charging portion has a second switch connected between the reference voltage output terminal and one of two terminals of the internal capacitance, a third switch connected between the reference voltage output terminal and the other terminal of the internal capacitance, a fourth switch connected between the signal line and one of two terminals of the internal capacitance, and a fifth switch connected between the signal line and the other terminal of the internal capacitance. It is preferable that the control portion first turns on the first switch, that then, the control portion turns off the first switch, and that subsequently, the control portion alternately turns on and off a pair of the second and fifth switches and a pair of the third and fourth switches a number of times, which corresponds to a value indicated by the low order bits other than the plurality of high order bits of the image data.
According to this circuit of the present invention, the gradient of an output voltage characteristic curve can be increased. In other words, even when the ratio of the value of the internal capacitance to the value of the parasitic capacitance is reduced, desired output voltage characteristics can be obtained. Thus, a capacitor having a small occupied area can be used as the internal capacitance.
Next, a signal driving circuit of the present invention has the aforementioned DA converter, and may consist of a shift register adapted to sequentially generate selection pulses respectively corresponding to signal lines by sequentially shifting a start pulse, a first latch portion adapted to output image data respectively corresponding to the signal lines by sequentially latching the image data according to the selection pulses, and a second latch portion adapted to latch the image data outputted from the first latch portion according to a latch pulse of one horizontal scanning period and to output the latched image data to the DA converter. According to this circuit of the present invention, the first latch portion generates point sequential image data. The second latch portion converts the point sequential image data to line sequential image data. Further, the DA converter performs a DA conversion by simultaneously performing a xcex3 correction according to the line sequential image data.
Next, a driving circuit of an electro-optical device of the present invention has the aforementioned signal line driving circuit, and a scanning line driving circuit for supplying scanning signals to the scanning lines, respectively, after a moment at which an operation of the second charging portion is terminated, when the value indicated by the low order bits is a maximum value. According to this circuit of the present invention, the scanning signal is active after the operation of the second charging portion is terminated, regardless of the value indicated by the image data. Thus, after a desired voltage is charged into the parasitic capacitance of the signal line, the transistor is turned on. Then, such a voltage can be applied to the pixel electrode.
Next, it is assumed that an electro-optical panel of the present invention comprises a device substrate, an opposing substrate having an opposing electrode, and a liquid crystal filled in the gap between the device substrate and the opposing electrode. Further, in this electro-optical panel, the aforementioned driving circuit, the plurality of signal lines, the plurality of scanning lines, transistors connected to the signal lines and to the scanning lines, and pixel electrodes connected to the transistors are formed on the device substrate. According to this panel of the present invention, the size of the entire system can be reduced, as compared with a panel in which the driving circuit is formed as a chip that is different from pixel regions.
Incidentally, preferably, the aforementioned transistors and those of the driving circuit are thin film transistors. According to this panel of the present invention, the pixel regions and the driving circuit can be formed in the same process. Further, especially, in the case that a glass substrate is employed as the device substrate, there is caused a variation in the operating characteristics of the thin film transistors. However, in the case of this driving circuit, desired voltages can be applied to the signal lines by transferring charges between the internal capacitance and the parasitic capacitance. Thus, even when the driving circuit is constructed by using thin film transistors, a DA conversion can be accurately performed.
Next, a projection display device of the present invention comprises the aforementioned electro-optical panel, a light source for irradiating the electro-optical panel with light, and a projection optical mechanism for enlargedly projecting light having passed through the electro-optical panel. Thus, the present invention provides a compact projection display device, which can show an image with good picture quality at low power consumption.
Next, the electronic equipment of the present invention having the aforementioned electro-optical panel is adapted to display an image on such an electro-optical panel. Consequently, the present invention provides electronic equipment having a low-power-consumption compact display device. Further, such electronic equipment is, for example, an engineering workstation, a pager, a hand-portable telephone set, a television set, a viewfinder type or direct-view-type camcorder, and a car navigation device.